Arrangement for controlling the current of an at least two-phase load with constant frequency supply voltage

ABSTRACT

An arrangement for the operation of a polyphase load from an alternating current source through the control of triacs. One triac is connected in each phase of the source connected to the load. The control electrodes of the triacs are controlled through a primary stage having a variable time delay in the form of a monostable multivibrator with RC network of variable resistance. A synchronizing device is connected between the primary stage and one phase of the alternating current source. Secondary control stages with fixed time delay elements receive signals from the primary stage or from other secondary stages to control the firing of the triacs. The firing pulses are generated through resetting of the monostable multivibrators present as the time delay elements in the control stages.

United States Patent Dieterich et al.

ARRANGEMENT FOR CONTROLLING THE CURRENT OF AN AT LEAST TWO- PHASE LOADWITH CONSTANT FREQUENCY SUPPLY VOLTAGE Inventors: Manfred Dieterich,Stuttgart-Zuffenhausen; Gunter Schirmer, Leinfelden;

Gerhard Conzelmann, Leinfelden-Unteraichen; Walter Harlin,Stuttgart-Kaltenta]; Gerhard Haustein, Leinfelden-Unteraichen; WilhelmOcker, Bonlanden, all of Germany Assignee: Robert Bosch GmbH, Stuttgart,Germany Filed: Feb. 20, 1970 Appl. No.: 13,135

Foreign Application Priority Data [56] References Cited UNITED STATESPATENTS 3,348,110 10/1967 Koppelmann ..318/227 3,443,184 5/1969 Lemmrich....318/227 3,443,185 5/1969 Sowa ..318/227 3,522,502 8/1970 Tuchen..318/227 X Primary Examiner-A. D. Pellinen Attorney-Michael S. Striker[5 7] ABSTRACT An arrangement for the operation of a polyphase load froman alternating current source through the control of triacs. One triacis connected in each phase of the source connected to the load. The.control electrodes of the triacs are controlled through a primary stagehaving a variable time delay in the form of a monostable multivibratorwith RC network of variable resistance A synchronizing device isconnected between Feb. 21, 1969 Germany ..P 19 08 726.4 the primarystage and one phase of the alternating current source. Secondary controlstages with fixed time delay ele- U.S.Cl ..323/24, 318/227, 323/34 mreceive i al from the primary stage or from other Int. Cl. ..GOSf l/56secondary stages to control the fi i f the triacs The fi i Search"318/227, 231? 323/22 pulses are generated through resetting of themonostable mul- 323/24 34 tivibrators present as the time delay elementsin the control stages.

17 Claims, 11 Drawing Figures p /5' 5 14 i9 W LOAD a: a3 a! CONT/20Lu/v/rs OPERA 77NG u/v/r v \SYNCHRONIZER i PATENTED MAR 2 8 I972 SHEET 3OF 6 #7 Arrow/Ev ARRANGEMENT FOR CONTROLLING THE CURRENT OF AN AT LEASTTWO-PHASE LOAD WITH CONSTANT FREQUENCY SUPPLY VOLTAGE BACKGROUND OF THEINVENTION system supplying a load. Control devices are connected to thecontrol electrodes of the semi-conductor switches. In power control andfor other regulating purposes, such control semiconductor switches haveshown themselves to be particularly applicable and advantageous. Theyoperate rapidly and reliably. With the controllable semi-conductorswitches, socalled phase control is realized, whereby the semi-conductorswitches are only conducting during a portion of a voltage half-wavefrom a power supply network. The central or neutral conductor applied toa load, results then from the currents and voltages during theconductive time interval of the semi-conductor switches. Through the useof bidirectional thyristor elements such as triacs, it is particularlysimple to control a connected alternating current load. Thus, forexample, it is particularly simple to control the operation of analternating current asynchronous machine. A bidirectional element issimilar to two simple thyristors connected in parallel and in oppositedirections. A triac, however, differs from this arrangement in that itis controllable in both current flow directions through properlypolarized firing pulses.

The control devices used conventionally for thyristors provide thefunction of the phase voltage of the power supply network, correspondingto the firing pulse. The phase relationship of the firing pulse isthereby established through transformers which have a winding for eachphase of the supply network. When such control devices are inserted intothe regulating circuits, as for example, in regulating circuits fordriving electrical machines, it is known in the art to obtain theoperating state of the machine through an indicating output value,

with the aid of tacho generators or devices. Such output valueindicating the actual operating state of the machine is then comparedwith a predetermined input value or desiredvalue through means of aregulator. The regulator operates in accordance with the deviationbetween the output and input values, upon a phase shift of the phasevoltage of the network through the firing instant of the controllablesemi-conductor.

It is the object of the present invention to simplify the control ordriving of bidirectional elements, and thereby to provide for regulationof electrical machines in a simple manner.

The solutions to the object of the present invention resides in anarrangement which uses a time delay element within a primary orfundamental stage that serves as a first control unit. The time delayelement has an adjustable or variable time delay, and is connected witha phase of the power supply network through a synchronizing arrangement.The further control devices include time delay elements which haveconstant time delays, and to which switching pulses are applied from theprimary stage or one of the time delay elements. The solution to theproblem resides, furthermore, in an arrangement of the aforementionedcharacter, in which the semi-conductor switches are setting elements ofa regulating circuit in which the regulating path is formed throughelectrical machines. The arrangement includes a regulator which hasapplied to it an input value or a desired value, as well as the outputvalue corresponding to the operational state of the electrical machine.A sampling stage for the output value or output parameter is providedwith one control input and a sampling input. This sampling stage hasdelay elements through which an output value is applied to the regulatorfromthe induced voltage of the electrical machine when this inducedvoltage exceeds a predetermined value within the blocking or turned offregion of the semi-conductor switches, at the load side of thesedirectly connected with a phase of the power supply network, through avoltage divider. At the same time, the control input of the samplingstage can be connected to the output of a current transformer which isarranged in the line between the semi-conductor switches from which theoutput value is sampled, and the power supply network. It has shownitself to be technically advantageous to sample an output value onlyduring a half-wave of the voltage of the supply network. This can beachieved in a particularly simple manner, when a diode is arranged inparallel with the control input of the sampling stage. An advantageousarrangement is realized with the control devices using time delayelements, when these time delay elements are in the form of monostablemultivibrators. A monostable multivibrator can then be used as thefundamental of primary stage with variable delay.

An advantage of the arrangement, in accordance with the presentinvention, resides in the simple manner in which the firing pulses arerealized through semi-conductor elements, and are then applied tomonostable multivibrator circuits to reproduce the polyphase system. Avery substantial advantage is realized compared to the use of tachogenerators, for example, by employing the sampling stage for the actualor output value in accordance with the present invention. The inducedvoltage at the semi-conductor switches during a phase cut-off, at theload side, is, for example, proportional to the armature back EMF orvoltage in an alternating current asynchronous machine. The magnitude ofsuch induced voltage is characteristic of the operating state of themachine. The omission of tacho generators or tachometers or similararrangements for obtaining the actual or output value, simplifiesconsiderably such a regulating circuit. Aside from this, it is possibleto connect arrangements or loads for extremely heavy operation, sincethe tachometer or tacho generator with its mechanical complexity andpossible error source is omitted. The sampling stage in accordance withthe present invention, is also usable for operation in conjunction withcontrol devices containing monostable multivibrators. The. time intervalof the primary stage may be varied in a particularly simple manner.

SUMMARY OF THE INVENTION An arrangement in which triacs are connectedbetween the output phases of a polyphase alternating current source anda corresponding load. The triacs are controlled from a controlled stagein the form of a primary stage having a time delay of variablemagnitude. A synchronizing device is connected between the primarycontrol stage and one of the phases of the alternating source. Secondarycontrol stages with fixed time delays receive signals from the primarystage. The time delays are achieved through monostable multivibratorcircuits, the variable time delay being established through an RCnetwork with variable resistance in the form of a transistor. Firingpulses are generated upon the resetting of the monostable multivibrator.When the load is in the form of an asynchronous machine, a sampler isconnected between the source and the machine and across a triac. Theoutput of the sampler provides the output parameter which is applied toa regulator unit having also an input parameter inserted to it. Theregulator supplies a signal to the primary control stage.

The novel features which are considered as characteristic for theinvention are set forth in particular in the appended claims. Theinvention itself, however, both as to its construction and its method ofoperation, together with additional objects and advantages thereof, willbe best understood from the following description of specificembodiments when read in connection with the accompanying drawing.

BRIEF DESCRIPTION OF THE DRAWING FIG. 1 is a block diagram of thecontrol arrangement for controlling the operation of a load from a powersupply network in the form of a polyphase system, in accordance with thepresent invention;

FIG. 2 is a block diagram representing another embodiment switches. Thecontrol input of the sampling stage can be ofthe arrangementof FIG. 1;

DESCRIPTION OF THE FREFERRED EMBODIMENTS Referring to the drawing, andin particular to FIG. 1, the three phases of an alternating currentsupply network are denoted by R,S and T, whereas neutral or centralconductor line'is denoted by the symbol MP. A triac 13 is connectedbetween the phase R and the load 12. Similarly, triacs l4 and areconnected between the phases S and T, and the load 12, respectively. Thetriacs 13 to 15 have control electrodes 16 to 18 which lead to theoutputs 19 to 21, respectively, of the control units 22 to 24. Thecontrol unit 22 serves as the basic stage, and is connected, with oneinput 25, to operating element 26. A second input 27 of the control unit22, is connected to a synchronizer 28 which, in turn, is connected tothe phase R. The control unit 24 is connected with the control unit 23,whereas the latter is connected to the basic stage or first stage 22.

The only difference between the embodiment shown in FIG. 2 and theembodiment shown in FIG. 1, resides in the feature that the control unit23 and the unit 24 are not interconnected with each other, as shown inFIG. 1. Instead, in FIG. 2, both of these control units 23 and 24 areconnected to the basic or first stage 22.

In operation of the arrangements of FIG. 1 and FIG. 2, an

operating pulse is applied by the synchronizer 28 to the input 27 of thebasic or primary stage 22, within a predetermined time interval of thephase voltage of phase R. After the expiration of a delay time intervalassociated with the primary stage 22, a triggering pulse is applied tothe control electrode 16 of the triac 13 from the output 19 of thisprimary stage 22. As a result of this application of the triggeringpulse to the control electrode 16, the triac 13 becomes conducting tillthe current passes through zero in phase R. An actuating or operatingpulse is, furthermore, applied to the control unit 23 simultaneouslywith the preceding trigger pulse. After the expiration of the time delayassociated with the control unit 23, a triggering pulse appears at itsoutput 20, and is applied to the control electrodes 17 of the triac 14.At the same time that the trigger pulse appears at the output 20, thecontrol unit 24 receives also an actuating or operating pulse from thecontrol unit 23. In a similar manner, a triggering pulse appears at theoutput 21 of the control unit 24, after the expiration of the time delayassociated with this unit. The triggering pulse appearing at the output21 is applied to the control electrode 18 of the triac 15.

Through the time delay elements which are controlled in sequence withinthe control units, the alternating current system of the power supply isreproduced. The delay time interval of the primary or basic stage 22 ismade adjustable through the operating unit 26 which feeds into thecontrol unit 22 through the input thereof. When, for example, the delaytime interval of the primary or basic stage 22 is substantially small,the triac 13 associated with the phase R becomes earlier triggered orfired. As a result, the triacs 14 and 15 also become earlier triggered.When, on the other hand, the delay time interval of the primary stage 22is large, the triac 13 becomes triggered substantially later as, forexample, shortly before the current in the phase R reaches zero. Thetriac 13, thereby, becomes turned ofi a short time thereafter. Thetriacs l4 and 15 then become triggered or switched on after a timeinterval corresponding to the shift in the three-phase current.

In a first case that may be considered, the load 12 can receive a largeamount of power from the network, whereas it receives only asubstantially small amount of power in a second case-The control units23 and 24 of FIG. 1 have each identical time delays which correspond tothe phase shift between each of two phases of the alternating currentsupply. The time delay of the control unit 23 and the control unit 24corresponds, thereby, to 60 electrical degrees. When, as shown in FIG.2, the control units 23 and 24 are simultaneously switched on by theprimary stage 22, the time delay associated with the control unit 23corresponds to an angle of 60 electrical degrees, whereas the time delayassociated with the control unit 24 corresponds to an angle of 120electrical degrees. As a result of this arrangement, the alternatingcurrent supply is reproduced at the outputs 19,20 and 21.

In the embodiment of FIG. 3, an asynchronous machine 29 operates inconjunction with the control units described in relation to FIG. 1. Aset parameter is applied to the input 25 of the primary stage 22, fromthe output of a regulator 30. A desired input value generator 32 appliesa desired value to the regulator 30. The sampling stage 31, on the otherhand, applies to the regulator 30 the actual prevailing output. Thesampling stage 31 has a sampling input 33 and a control input 34. Thesampling input 33 is connected between the phase S associated with thetriac 14, and the asynchronous machine 29. The control input of thesampler 31, on the other hand, is connected with the phase S of thealternating current system of the power supply network. Thus, the input33 is connected between the triac 14 and the machine 29, whereas theinput 34 is connected between the triac 14 and the phase S. l

The functional operation of the embodiment of FIG. 3 may be clarifiedthrough the current and voltage diagrams illustrated in FIGS. 5a and 5b.Thevoltage of the phase S of the supply network, is designated by thecurve U. Within the time interval to and tz, the curve U does not followa smooth function, and is instead, denoted by a dotted line within thistime interval. The current I flowing through the triac 14, is denoted bya dashed line. The current I ceases at the instant of time to, whereasthe triac 14 again conducts after the time instant tz. Since anasynchronous machine has a severe inductive characteristic, particularlywhen in the idling or unloaded state, a significant phase shift prevailsbetween current and voltage. Within the time interval denoted by theinstants to and tz, the triac 14 is cut-off, and at the load side ofthis triac, the voltage Ui prevails. This voltage Ui corresponds to theinduced armature voltage of the asynchronous machine 29.

A measuring region a lies within the cut-off interval of the triac l4and begins after the expiration of a time delay corresponding to theangle a beginning at the instant when the voltage passes through zero.During this measuring interval a,,,,-the voltage appearing between thetriac 14 and the load 29, is applied to the sampler or sampling stage 31of the regulator 30. In the diagram of FIG. 5a, the angle between thetime instants to and tz, is small, and the triac 14 is fired ortriggered through the control unit 23 after a time interval terminatingat tz. This time interval terminating at tz corresponds to an angle ofa, a, and the instant tz corresponds to the instant after the phasevoltage has passed through zero. The interval a, is, thereby, a basictime delay which is firmly set and cannot be exceeded. It serves thepurpose of preventing the firing of the triac prematurely and before thecurrent has become zero, in

v extreme C3588.

If, for example, the firing of the triac occurs at an instant at whichthe current has not yet become quite zero, then the triac becomes turnedoff through the subsequent zero passage and remains thereby cut-ofi'through the entire subsequent half-wave. The measuring region a,,,connects to the fundamental or basic delay 01,, in the example underconsideration. The end or termination of the fundamental delay a, andthe beginning of the measuring region a need not be identical. Thefundamental or basic delay oz, becomes determined through the basic orprimary stage 22, whereas the beginning of the measuring region isdetermined by the sampling stage 31. Only in the worst case in which theignition or firing angle is minimum and the phase shift is maximumbetween current and voltage, is it possible that the measuring regiona,,, does not fully cover the cut-off region of the triac. Such an errorwhich may act as a disturbing factor is, however, compensated. In thecase in which the measuring region is extensively covered by theoperating voltage, the entire network supply voltage lies or prevails'atthe load in any event.

In the diagram of FIG. 5b, the voltage U and current I are shown inrelation to a substantially larger firing angle. The

measuring region a is again determined through the fundamental delay11,. The triac receives a firing pulse after a time intervalcorresponding to the summation of the angles a, a

This total angle a, a terminates at the instant tz. The triac wascut-off to the instant to, since the current passed through zero. Theinduced armature voltage is again designated again by Ui within thecut-off region of the triac. Under this operating condition, the triaccan conduct substantially smaller power from the supply network, thenthat derived from the product of the applied voltage to the asynchronousmachine and the current. The time intervals corresponding to the anglesa, and a,,,, are determined by the delay elements within the samplingstage 31. The sampling stage 31 is connected with the phase S throughthe control input 34, and the beginning of the time intervalscorresponding to a and a can, thereby, be established. A regulatingsignal or error signal is applied to the regulator 30, which is derivedfrom the input and output parameters applied to the unit 30 by thegenerator 32 and sampling stage 31. From the regulating parameterapplied to the input 25 of the primary stage 22, the delay interval ofthat stage may be extended or shortened. As a result, a very rapidshifting of the firing instant or point of the triacs 13 to 15, can berealized. The regulation functions very precisely even when the samplingstage 31 is only connected in front and behind a triac as, for example,the triac 14.

The use of the sampling stage for sampling the actual prevailingparameter, is not limited to the use of monostable multivibratorcircuits within the control units. When, for example, an asynchronousmachine is to be selectively connected to two networks of differentfrequencies, then either the delay times within the control units 22 to24 must be adjustable in accordance with the frequencies, or controlunits of the conventional design can be used in conjunction with thesampling stage 31 and a corresponding regulator, in accordance with thepresent invention.

In the embodiments of FIGS. 4 and 6 to FIG. 9, the detailed circuitry isprovided for the arrangement of FIG. 3.

The circuit shown in FIG. 4, serves to produce two power supply voltagesUB and UBS. This circuit, furthermore, serves to synchronize theassociated parts or elements. The three phases of the alternatingcurrent supply networks are denoted by R,S and T, and the central orneutral conductor is denoted by MP. The primary winding 41 of atransformer 42 is connected between the phase R and the centralconductor MP. The secondary winding of this transformer is denoted bythe reference numeral 43. The diodes 44, 45, 46 and 47 form a full-waverectifier, and the terminals of the secondary windings 43 are connectedbetween the diodes 44 and 46, as well as the diodes 45 and 47. Theanodes of the diodes 44 and 45 are connected together and to a line 48which is of negative potential and which is connected with the line MPof the alternating current supply network. The cathodes of the diodes 46and 47 are connected together and to a line 49 which conducts a positivepotential. A filter and stabilizing circuit 50 is connected to the line49, and has two outputs. The filtered DC voltage UB appears at one ofthe outputs of the circuit 50, whereas the stabilized DC voltage UBS maybe taken from the other output'of this circuit 50. The cathode of thediode 44, furthermore, is connected to the anode of a diode 51, whereasthe cathode of the diode 45 is connected to the anode of a diode 52. Thecathodes of the diodes 51 and 52 are coupled together and connected to acircuit junction 53 which leads to the line 48, through a resistor 54.Connected in parallel with the resistor 54, is a capacitor 55. Aresistor 57, furthen'nore,

has one terminal connected to the circuit junction 53, and anotherterminal to the connector 58.

In operation of the circuit of FIG. 4, the power supply voltages UB andUBS are produced from the diodes 45, 44, 46 and 47, as well as thefilter arrangement 50. These supply voltages UB and UBS are used toenergize and supply a circuit arrangement to be described. The diodes44, 45, 51 and 52 also form a full-wave rectifier. Connected to thisfull-wave rectifier, is a filter circuit comprised of the resistor 54 aswell as the capacitor 55 which form a parallel circuit between thecircuit junction 53 and the circuit line 48. This filter arrangement orfilter circuit does not respond to the fundamental wave of the rectifiedalternating voltage, but instead it responds only to higher harmonics.Through this arrangement, disturbances resulting from pulses initiatedthrough the harmonics are avoided. Such disturbing effects influence thefiring instants of the triacs. The DC rectified voltage appearing acrossthe resistor 57 and derived from the circuit junction 53, is analternating voltage in which the negative half-wave is flapped overabout the time axis. This voltage is used for generating a startingpulse for a threshold voltage amplifier in conjunction with a primarystage to be described below.

FIG. 6 shows the circuit arrangement of an embodiment for the samplingstage. In this circuit arrangement, only the phase S with the triac 14is included. In parallel with the triac 14, is a variable resistor 64used to protect the triac from excessively high reverse voltages. Thecontrol electrode 17 of the triac 14 is connected to the phase S. A line67 is connected to the terminal marked UBS in FIG. 4 as an output of thefilter and stabilizing circuit 50. The central conductor or neutral lineMP of the three-phase system is again denoted by the reference numeral48. The base of a transistor 68 is connected, through a resistor 69, tothe phase S. At the same time, the base of the transistor 68 is coupledto the line 48 through a diode 70. The cathode of the diode 70 is, inthis arrangement, directly joined to this base of the transistor 68. Theemitter of this transistor is also connected to the line- 48, whereasthe collector of transistor 68 leads, through a resistor 71, to the line67. A first time delay element is comprised from the series circuit of acapacitor 72 and resistor 73, which leads from the collector of thetransistor 68 to the line 67. The base of a transistor 74 is connectedto the junction of the capacitor 72 and resistor 73, whereas the emitterof this transistor 74 is also connected to the line 48. The collector ofthe transistor 74 leads to the line 67 through a resistor 75. The seriescircuit of a capacitor 76 and resistor 77, lies between the collector ofthe transistor 74 and the line 67, and forms a second delay network. Thebase of a further transistor 78 is connected to the junction betweencapacitor 76 and resistor 77, and the emitter of this transistor 78 isdirectly connected to the line 48. The collector of transistor 78, onthe other hand, leads to the line 67 through a resistor 79. The cathodeof a diode 80 is connected to the collector of the transistor 78, andthe anode of diode 80 is the diode 80 is, furthermore, the seriescombination of a diode 82 and resistor 81. The diode 82 is directed sothat the cathode is connected to the line 48. The base of a transistor83 is connected to one terminal of the resistor 81 which has its otherterminal joined to the anode of the diode 82. The base of transistor 83,furthermore, leads through a resistor 84, to the load side of the triac14. From the collector of the transistor 83, a resistor 86 leads to thecircuit junction between a resistor 87 anda capacitor 88. The otherterminals of this resistor 87 and capacitor 88 are connected togetherand to the line 67. The resistors 89, 90 and 91 form a voltage dividierconnected between the lines 48 and 67. The resistor 90 is an adjustableone with a sliding contact 96 which is connected to the emitter of thetransistor 83. A capacitor 93 is, furthermore, connected between theemitter of transistor 83 and the line 48;.

FIG. 7 shows a variation in the circuit arrangement of the samplingstage. The primary winding 94 of a current transformer is connected inseries with the phase S. The secondary winding 95 has one terminalconnected to the line 48, and its other terminal to the base of atransistor 140. The functional operation of the circuit of FIG. 6 willbe described in co'njunc tion with the diagrams shown in FIG. 10.

The voltage function shown in FIG. a appears in the phase S of the powersupply network. Through the series circuit of the resistor 69 and diode70, which lies between the phase S and the line 48, the sampling stagebecomes controlled from the waveform in FIG. 10a corresponding to thephase voltage of the power supply network. The voltage appearing at thebase of the transistor 68 to which the cathode of the diode 70 isconnected, is represented in FIG. 10b. During the positive half-wave ofthe voltage in phase S, the diode 70 is cut-off, and the base-emitterpath of the transistor 68 conducts. During the negative half-wave, onthe other hand, the diode 70 conducts and the base-emitter path of thetransistor 68 is cut-off or non-conducting. The voltage functionappearing at the collector of the transistor 68 appears in FIG. 100.During the positive half-wave of the voltage, its collector assumessubstantially the potential of the circuit line 48, whereas the negativehalf-wave assumes substantially the potential of the circuit line 67. InFIG. 10d, the voltage function is shown at the base of the transistor74. The negative voltage spikes at the colector of the transistor 68,produce negative voltage pulses from the capacitor 72 and resistor 73,the combination of which constitutes a time delay element. Thesenegative voltage pulses from the time delay element cut-off or turn-offthe transistor 74 for the duration of these pulses. The positive voltagespikes at the collector of the transistor 68 do not affect thetransistor 74 when in the conducting state, through the resistor 73.Through the negative voltage pulse, the transistor 74 becomes turnedoff, as shown in FIG. 10a. The negative voltage spikes at the base ofthe transistor 74 produce the voltage function illustrated in FIG. 10f,at the second time delay element consisting of the capacitor 76 and theresistor 77. This voltage function is, consequently, also applied to thebase of the transistor 78. The negative pulses arise here, similarly asat the base of the transistor 74. The transistor 78 is held in theconducting state through the resistor 77.

Through the negative voltage pulses which appear at the time delayelement constituted of the capacitor 76 and the resistor 77, thetransistor 78 is turned off for a period of time corresponding to theduration of these negative voltage pulses. When, now, the transistor 78is turned off or cut-off, the series circuit consisting of the resistor81 and the diode 82, is not bridged by the transistor. The resistors 84and 81 form a voltage divider having a tap connected to the base of thetransistor 83. At this base of the transistor 83 appears, thereby, thevoltage function described in FIG. 10g. This voltage corresponds to theactual measured and prevailing voltage. If this measured voltage has anegative potential relative to the line MP, then this negative potentialis conducted through the diode 80 and is not applied through thetransistor 83 for switching this transistor to the conducting state. Thetransistors 78 and 83 become, thereby, not subjected to a negativemeasured voltage which is too high. With the aid of the voltage dividerwhich consists of resistors 89, 90 and 91, the emitter of the transistor83 has applied to it a fixed potential. The resistor 90 of this voltagedivider has a movable or slidable tap 96.

As soon as the voltage at the base of the transistor 83 rises above thisfixed potential, the transistor becomes conducting, and the capacitor 88becomes charged through the resistor 86. Corresponding to the desiredvalue which is to prevail, the proper voltage is set or applied throughthe tap 96 of the resistor 90. The voltage applied to the base of thetransistor 83 corresponds to the actual prevailing value, as describedabove. At the terminal 85 leading to the junction of the parallelcombination of the capacitor 88 and resistor 87, a voltage signal isattained which represents the difference between the actual prevailingvalue and the desired value. The resistor 87 connected in parallel withthe capacitor 88 serves the purpose that the voltage prevailing at theterminal 85 can actually follow the difference between actual anddesired values for a period of time determined by the time constant ofthe capacitor 88 in combination with the resistor 87.

The resistors 89 and 91 apply an adjustable desired value or inputbetween the lowest and highest possible value within the region of thisparameter. FIG. 7 shows a variation of the circuit arrangement for thesampling stage whereby the actually prevailing value or output issampled. When using the arrangement of FIG. 6, the negative voltagepulses illustrated in FIG. 10b are realized when the voltage of phase Spasses through zero. When using the arrangement of FIG. 7, thiscondition applies when the current in phase S goes through zero. Thearrangement of FIG. 7 is more complex, but phase shifts which arepossible between voltage and current, are here no longer critical. Theactual prevailing value or output is always sampled in this embodiment,when no voltage is induced within the secondary winding of the currenttransformer, corresponding to the state when the applicable triac isturned off. The sampling region can, therefore, never fall within theconductive region of the triacs.

When very undesirable phase shift occurs between current and voltagewith the arrangement of FIG. 6, it is conceivable that thesemi-conductor switches are triggered or switched shortly before thecurrent passes through zero. Such switching of the semi-conductorelements may be accomplished through switching or firing pulses. Whenthe current passes through zero, the next or subsequent time, theseswitches are again turned off and remain, thereby, cut-ofi or turned offfor the entire following half-wave. During this following half-wave, theswitches were to have been conducting or turned on, corresponding to theoperating state of the machine. This operating state can be avoided, inone case, by using an ignition or firing oscillator in place of a firingpulse. This condition can also be avoided by using the arrangement ofFIG. 7 in conjunction with an adapted control logic which first firesthe triac, when no voltage is induced any longer within the secondarywinding of the transformer.

In the circuit diagrams of FIGS. 8 and 9, monostable multivibratorcircuits are used for the time delay elements. FIG. 8 shows a basic orprimary stage in which the delay time is variable. FIG. 9 shows amonostable multivibrator having a constant delay time. A supply line 105prevails in addition to the line 67 connected to the supply UBS. Thesupply line 105 is connected to the terminal UB which is shown to beconnected with the filter and stabilizing circuit 50 in FIG. 4. Theprimary stage or basic stage shown in FIG. 8, has two switchingtransistors 106 and 107 which are feedback coupled. The emitters ofthese transistors 106 and 107 are connected together through the line108. This line 108 is further connected with the line 48, through azener diode 109. The line 108 acquires a zener voltage corresponding toa zener diode in the form of a positive potential relative to the line48. The collectors of the switching transistors 106 and 107 areinterconnected through the resistors 110 and 111, respectively, with theline 67. A capacitor 112 is connected between the collector of thetransistor 106 and the circuit junction 113 which, in turn, leads to theline 67 through a resistor 114. The collector of the transistor 107 iscoupled to the base of the transistor 106 through the resistor 115,whereas the base of the transistor 106 is coupled to the line 48 throughthe resistor 116. The base of a driving transistor 118, furthermore, iscoupled to the collector of the transistor 107, through a couplingcapacitor 117. At the same time, the base of the transistor 118 isconnected to the line 67, through a resistor 119. The emitter of thetransistor 118 is connected directly to the line 48, whereas thecollector of this transistor 118 leads to the line through a seriescircuit consisting of a resistor 120 and the primary winding 121 of afiring transformer. A capacitor 122 is connected in parallel with thisprimary winding 121 of the firing transformer. The base of the switchingtransistor 107 is connected directly to the cathode of a diode 123. Theanode of this diode 1123 is, on the other hand, connected to the circuitjunction 113. At the same time, the base of the transistor 1107 leads tothe line 48 through the resistor 124. A capacitor 125 is coupled,moreover, with this base of the transistor 107 and the collector of thetransistor 126 having its emitter connected directly to the line 108.The collector of this transistor 126 leads, through a resistor 127, tothe line 67. A voltage divider is applied between the line 67 and theline 108. This voltage divider consists of resistors 128 and 129. Thebase of a control transistor 130 is connected to the junction of theseresistors 128 and 129, whereas the collector of this control transistor130 is connected directly to the circuit junction 1 13. The emitter oftransistor 130 leads to the terminal 132, through a resistor 131. I

In operation of the circuit of FIG. 8, the terminal 132 is connectedwith the terminal 85 shown in the circuit arrangement of FIG. 6. Thebase of the transistor 126 is connected with the terminal 58 of thecircuit shown in FIG. 4. The base of the transistor 126 has applied toit a voltage representing that prevailing between phase R and line MP.This voltage applied to the base of the transistor 126 is reducedthrough the aid of the transformer 42. This transistor 126 commences toconduct as soon as the voltage at its base is more positive than thevoltage at its emitter. The emitter voltage of this transistor is fixedthrough the zener voltage of the zener diode 109. Through further riseor increase in the potential at the base of this transistor, the latterbecomes saturated after a short time interval. From the switching of thetransistor 126, only the alternating current portion corresponding to anegative pulse is applied to the base of the transistor 107, through thecapacitor 125. This transistor 107 conducts while in its inoperative orquiescent state through the resistor 114. As a result of the appliedpulse, this transistor is turned off. The switching transistor 106becomes,- thereby, turned on and this switching process takes place in aparticularly short time interval, due to the support of the feedbackcoupling resulting from the interconnection of both of the emitters ofthe switching transistors 106 and 107. The voltage prevailing across thecoupling capacitor 112 cannot vary or change within the short switchingtime, since the stored energy within a capacitor cannot vary suddenly orin a step-wise manner. Accordingly, a negative step voltage also appearsat the circuit junction 113. The capacitor 112 becomes dischargedthrough the resistors 110, 114 and through the control transistor 130.In this manner, the circuit junction 113 can again acquire positivepotential. The duration of the discharge process is variable over widelimits, through the charging current portion which is delivered by thecollector of the control transistor 130. The collector current of thecontrol transistor 130 is, however, dependent upon the current flow inits emitter, since it is driven as a common base circuit. This currentflow in the emitter corresponds to the difference between actualprevailing value or output and the desired value or input. Such currentflow representing this difference is taken from the terminal 85 in thecircuit of FIG. 6.

As soon as the circuit junction 113 has again become positive so thatthe diode 123 and the base-emitter path of the switching transistor 107commence to conduct, the monostable multivibrator returns to its initialstate. Through the voltage applied to the terminal 132 and is taken fromthe circuit junction or terminal 85 in FIG. 6, the time interval of themonostable multivibrator of the primary or fundamental of the drivingtransistor 118 through the capacitor 117. This driving transistor 118 isturned off briefly thereupon, and as a result a brief current variationtakes place within the primary winding 121 of the ignition transformer.Such variation in the current within the primary winding 121, induces anignition or firing pulse within the secondary winding 66, not shown inthat Figure. The capacitor 122 serves to dampen the switching process ofthe primary winding 121 of the firing transformer, and is, for thispurpose, connected in parallel with the capacitor 122. If thefundamental stage or primary stage is still not reset to its initialstate, before a new negative pulse is transmitted to the base of theswitching transistor 107 through the collector of transistor 126 andcapacitor 125, then a negative pulse shortly prior to that from thetransistor 126 could switch the monostable multivibrator to its quasistable state. Through the cut-off of the transistor 126, a positivepulse is generated and transmitted to the base of the transistor .107,so that the monostable multivibrator is forced into its stable state.

Through the circuitry of FIG. 8, the firing of the triac is accomplishedthrough a single substantial pulse. Itis also possible, however, toswitch on, for example, an oscillator in the form of a blockingoscillator with the aid of control logic. In this manner, the triacsreceive firing pulses during the entire period of time that they are tobe conducting. Such a control logic switches, for example, the firingpulse generator when the monostable multivibrator has been returned toits initial state and the phase voltage or phase current has exceeded apredetermined value.

The circuit shown in FIG. 9, has a monostabel multivibrator with timeinterval which is not variable. Such a switching circuit serves as atime delay element of constant delay time which may be found in thecontrol units 23 and 24 of FIG. 1 to 3. This circuit is very similar tothe circuit of FIG. 8 in which the fundamental or primary stage isshown. All of the variable elements for the charging current of thecapacitor 112, as well as the diode 123, have been omitted. The controlresults from synchronization of the supply network through the primarystage which actuates the driving transistor 118. The base of theswitching transistor 106 leads to a terminal 133 through a diode 134 andresistor 135. This terminal 133 is connected to the collector of adriving transistor 118 which is, for example, the driving transistor ofthe primary or fundamental stage. Through the diode 134, only positivepulses are applied to the base of the switching transistor 106. In thismanner, the transistor 106 can only receive a positive switching pulseupon resetting of the transistor 107 or when cutting off the drivingtransistor 118. Several such monostable multivibrators can be connectedin series so that each return of a switching transistor 107, thefollowing monostable multivibrator receives a positive switching pulse.In this case, the time interval of the monostable multivibrator,corresponds to the phase shift between the nodal points of two phasevoltages of the supply network. If, however, all subsequent monostablemultivibrators with constant time interval, are simultaneouslycontrolled from the primary or fundamental stage, then all intervals ofthe monostable multivibrators may not all be identical. Instead, theseintervals must be scaled or set so that their resetting corresponds intime to the prevailing phase shift between two phase voltages of thepower supply network.

An advantageous regulating feature may be realized in the operation ofthe arrangement shown in the block diagram of FIG. 3 and presented indetail in the following Figures, when the sampling stage for the actualor prevailing value is first switched on after a predetermined timedelay. Such delayed switching on of the sampling stage is to take placeafter actuating or turning on the entire arrangement through actuatingthe switch of the power supply network. This is, for example, realizablewith a further RC delay element. In this manner, the regulator receivesahead of time a fictitious zero value for the actual or output value,during the duration of the time delay. 7 'Accordingly, the machine canoperate with full power and pick-up speed.

In the example under consideration, a neutral line or central line wasnecessary from the alternating current network, for the purpose ofhaving a reference potential for the output value. Such a central lineor neutral conductor can be omitted when two triacs of two followingphases or consecutive phases are simultaneously fired from one controlunit. A return flow through a neutral or center conductor is then nolonger necessary, since a closed circuit is formed between the twoconsecutive phases of the power supply network. Even when two triacs aresimultaneously fired, an alternating field prevails at the load side.

For synchronizing and realizing a fixed reference point for the outputpotential, when the asynchronous machine is connected to an alternatingcurrent network without a central or neutral conductor, it is possibleto provide a synchronizing arrangement for a Y-connected machine. Such asynchronizing arrangement is reproduced with the aid of secondarywindings of transformers, and reproduces the alternating field of thepower supply network. With this arrangement, the firing instants areapplied to the voltages of the power supply network through thesecondary alternating field of the regulator. Since in this case eachphase of the network has already a secondary winding of a transformer,the control of the triacs may be carried out with firing pulses fromconventional firing apparatus. The secondary windings of the transformercan be carried by a single core for all phases, or each phase can bearranged on a separate core or transformer. The advantage of thesampling stage with the design of the present invention, is alsoapplicable to the preceding arrangement. In this case, in particular, itis desirable to provide separate control logic for each triac. Thecontrol logic switches on an oscillator generating a firing pulserelative to the phase voltage of the supply network with a predeterminedphase shift from the regulator.

When a plurality of electrical machines operate in parallel from onesystem, the control electrodes of all semi-conducting switches may beconnected in parallel. These semi-conducting switches are thenassociated with one phase of the supply network. In this manner, onlyone regulating circuit is required for the entire system of paralleloperating machines.

It will be understood that each of the elements described above, or twoor more together, may also find a useful application in other types ofconstructions differing from the types described above.

While the invention has been illustrated and described as embodied in anarrangement for controlling semi-conductor switches from two directionsof current flow, it is not intended to be limited to the details shown,since various modifications and structural changes may be made withoutdeparting in any way from the spirit of the present invention.

Without further analysis, the foregoing will so fully reveal the gist ofthe present invention that others can by applying current knowledgereadily adapt it for various applications without omitting featuresthat, from the standpoint of prior art, fairly constitute essentialcharacteristics of the generic or specific aspects of this inventionand, therefore such adaptations should and are intended to becomprehended within the meaning and range of equivalence of thefollowing claims.

What is claimed as new and desired to be protected by Letters Patent isset forth in the appended claims.

We claim:

1. An arrangement for operating bidirectional, controlled,semi-conductor switches, comprising, in combination, a source ofalternating current with at least two phases; load means for operationfrom said source of alternating current; a respective bidirectional,controlled, semi-conductor switch connected in each phase between saidsource and said load means; control means including a first controlstage having a time delay element with variable time delay, said controlmeans further including as many secondary control stages as there arephases minus one, each secondary control stage having a time delayelement with fixed time delay, each secondary control stage beingconnected to receive signals at least indirectly from said first controlstage, said first control stage and each said secondary control stagebeing connected to the control electrode of a respective saidsemi-conductor switch to control the conductivity of the latter, saidfirst control stage and said secondary control stages being connected inseries so that one secondary control stage receives a signal directlyfrom said first control stage and each secondary control stage exceptingsaid one secondary control stage receives a signal from that secondarycontrol stage to which it is connected; and synchronizing meansconnected between said first control stage and the phase associated withthe semi-conductor switch to which said first control stage is connectedfor determining when the latter will render conductive thesemi-conductor switch connected to said first control stage, said firstcontrol stage comprising: monostable multivibrator means with twofeedback coupled switching transistors having emitters connectedtogether and altematingly turned on and turned off,

the output of said synchronizing means being connected with the base ofa first one of said transistors, said first transistor being turned onin the quiescent state, first capacitor means connected between thecollector of the second one of said two transistors and said firsttransistor, first resistor means connected between the collector of saidfirst transistor and the base of said second transistor, Zener diodemeans for applying a fixed potential to the emitters of said twoswitching transistors, an auxiliary transistor with an emitter connectedto the emitters of said switching transistors, the base of saidauxiliary transistor being connected to said synchronizing means, anddifferentiating means connected between the collector of said auxiliarytransistor and the base of said first switching transistor, saiddifferentiating means comprising: second capacitor means connectedbetween the collector of said auxiliary transistor and the base of saidfirst transistor, and second resistor means connected to the junction ofsaid second capacitor means and the base of said first transistor, saidsecondary control stage comprising: a third transistor and a fourthtransistor with emitters connected together, third capacitor meansconnected between the collector of said third transistor and the base ofsaid fourth transistor, third resistor means connected between the baseof said third transistor and the collector of said fourth transistor,further Zener diode means connected to the emitters of said third andfourth transistors for applying a fixed potential to the emitters ofsaid third and fourth transistors, said third and fourth transistorscomprising monostable multivibrator means, and input diode meansconnected to the base of said third transistor for applying a signal tosaid monostable multivibrator means of said secondary stage comprised ofsaid third and fourth transistors.

2. The arrangement as defined in claim 1 wherein said source ofalternating current is a polyphase alternating current system.

3. The arrangement as defined in claim 1 wherein said first monostablemultivibrator has a resistor-capacitor network for determining said timedelay, the resistor of said network being a variable resistor.

4. The arrangement as defined in claim 1 wherein said first monostablemultivibrator has a resistance-capacitance network for determining saidtime delay, said resistance of said resistance-capacitance network beinga controlled transistor for providing variable resistance.

5. The arrangement as defined in claim 1, wherein each saidsemi-conductor switch is a triac.

6. The arrangement as defined in claim 1, wherein each said time delayelement is a monostable multivibrator.

7. The arrangement as defined in claim 6, including a respective pulsegenerator in said first control stage and in each said secondary controlstage'for producing a firing pulse for the respective semi-conductorswitch whenever the corresponding monostable multivibrator resets.

8. The arrangement as defined in claim 1, wherein said synchronizingmeans comprises transformer means connected to the phase associated withthe semi-conductor switch to which said first control stage isconnected; a full-wave rectifier connected to the secondary winding ofsaid transformer means; and filter means connected in parallel with saidfullwave rectifier for filtering only the upper wave portions of saidsource of alternating current.

9. The arrangement as defined in claim 8 including threshold amplifyingmeans in said synchronizing means for applying a signal to said firstcontrol stage when a predetermined threshold voltage is exceeded.

10. The arrangement as defined in claim 1, wherein said load means iselectric machine means, and further including sampling means having timedelay means, control input means, sampling input means, and outputmeans, said control input means being connected to the source side of atleast one said semi-conductor switch for controlling when the time delayof said time delay means begins, said sampling input means beingconnected to the load side of said at least one semi-conductor switchfor sampling the voltage at the load side primarily while said at leastone semi-conductor switch is non-conductive; a desired value generator;a regulator connected to receive as input the output of said desiredvalue generator and of said sampling means for providing as an electricsignal output a set parameter for shifting in time, in dependence on thedifference between the sampled voltage and the output of said desiredvalue generator, when the semi-conductor switches are turned on, saidfirst control stage being connected to receive as input the electricsignal output of said regulator.

11. The arrangement as defined in claim 10, including voltage dividingmeans connected to the phase associated with said at least onesemi-conductor switch, said sampling input means being connected to atap of said voltage dividing means.

12. The arrangement as defined in claim 10, including cur renttransformer means with output connected to said control input means ofsaid sampling means, said transformer means being connected in the phaseof said source between said source and said at least one semi-conductorswitch.

13. The arrangement as defined in claim 12, including diode Y theinstant of sampling by said sampling means.

16. The arrangement as defined in claim 1, wherein said 'source ofalternating current is a polyphase source with neutral conductor, saidload means being a polyphase load with neutral conductor connected tothe neutral conductor of said source, said semi-conductor switches beingoperated in cyclical sequence corresponding to the phases of said sourceof alternating current.

17. The arrangement as defined in claim 1, wherein each secondarycontrol stage is directly connected to said first control stage.

1. An arrangement for operating bidirectional, controlled, semiconductorswitches, comprising, in combination, a source of alternating currentwith at least two phases; load means for operation from said source ofalternating current; a respective bidirectional, controlled,semi-conductor switch connected in each phase between said source andsaid load means; control means including a first control stage having atime delay element with variable time delay, said control means furtherincluding as many secondary control stages as there are phases minusone, each secondary control stage having a time delay element with fixedtime delay, each secondary control stage being connected to receivesignals at least indirectly from said first control stage, said firstcontrol stage and each said secondary control stage being connected tothe control electrode of a respective said semi-conductor switch tocontrol the conductivity of the latter, said first control stage andsaid secondary control stages being connected in series so that onesecondary control stage receives a signal directly from said firstcontrol stage and each secondary control stage excepting said onesecondary control stage receives a signal from that secondary controlstage to which it is connected; and synchronizing means connectedbetween said first control stage and the phase associated with thesemi-conductor switch to which said first control stage is connected fordetermining when the latter will render conductive the semi-conductorswitch connected to said first control stage, said first control stagecomprising: monostable multivibrator means with two feedback coupledswitching transistors having emitters connected together andalternatingly turned on and turned off, the output of said synchronizingmeans being connected with the base of a first one of said transistors,said first transistor being turned on in the quiescent state, firstcapacitor means connected between the collector of the second one ofsaid two transistors and said first transistor, first resistor meansconnected between the collector of said first transistor and the base ofsaid second transistor, Zener diode means for applying a fixed potentialto the emitters of said two switching transistors, an auxiliarytransistor with an emitter connected to the emitters of said switchingtransistors, the base of said auxiliary transistor being connected tosaid synchronizing means, and differentiating means connected betweenthe collector of said auxiliary transistor and the base of said firstswitching transistor, said differentiating means comprising: secondcapacitor means connected between the collector of said auxiliarytransistor and the base of said first transistor, and second resistormeans connected to the junction of said second capacitor means and thebase of said first transistor, said secondary control stage comprising:a third transistor and a fourth transistor with emitters connectedtogether, third capacitor means connected between the collector of saidthird transistor and the base of said fourth transistor, third resistormeans connected between the base of said third transistor and thecollector of said fourth transistor, further Zener diode means connectedto the emitters of said third and fourth transistors for applying afixed potential to the emitters of said third and fourth transistors,said third and fourth transistors comprising monostable multivibratOrmeans, and input diode means connected to the base of said thirdtransistor for applying a signal to said monostable multivibrator meansof said secondary stage comprised of said third and fourth transistors.2. The arrangement as defined in claim 1 wherein said source ofalternating current is a polyphase alternating current system.
 3. Thearrangement as defined in claim 1 wherein said first monostablemultivibrator has a resistor-capacitor network for determining said timedelay, the resistor of said network being a variable resistor.
 4. Thearrangement as defined in claim 1 wherein said first monostablemultivibrator has a resistance-capacitance network for determining saidtime delay, said resistance of said resistance-capacitance network beinga controlled transistor for providing variable resistance.
 5. Thearrangement as defined in claim 1, wherein each said semi-conductorswitch is a triac.
 6. The arrangement as defined in claim 1, whereineach said time delay element is a monostable multivibrator.
 7. Thearrangement as defined in claim 6, including a respective pulsegenerator in said first control stage and in each said secondary controlstage for producing a firing pulse for the respective semi-conductorswitch whenever the corresponding monostable multivibrator resets. 8.The arrangement as defined in claim 1, wherein said synchronizing meanscomprises transformer means connected to the phase associated with thesemi-conductor switch to which said first control stage is connected; afull-wave rectifier connected to the secondary winding of saidtransformer means; and filter means connected in parallel with saidfull-wave rectifier for filtering only the upper wave portions of saidsource of alternating current.
 9. The arrangement as defined in claim 8including threshold amplifying means in said synchronizing means forapplying a signal to said first control stage when a predeterminedthreshold voltage is exceeded.
 10. The arrangement as defined in claim1, wherein said load means is electric machine means, and furtherincluding sampling means having time delay means, control input means,sampling input means, and output means, said control input means beingconnected to the source side of at least one said semi-conductor switchfor controlling when the time delay of said time delay means begins,said sampling input means being connected to the load side of said atleast one semi-conductor switch for sampling the voltage at the loadside primarily while said at least one semi-conductor switch isnon-conductive; a desired value generator; a regulator connected toreceive as input the output of said desired value generator and of saidsampling means for providing as an electric signal output a setparameter for shifting in time, in dependence on the difference betweenthe sampled voltage and the output of said desired value generator, whenthe semi-conductor switches are turned on, said first control stagebeing connected to receive as input the electric signal output of saidregulator.
 11. The arrangement as defined in claim 10, including voltagedividing means connected to the phase associated with said at least onesemi-conductor switch, said sampling input means being connected to atap of said voltage dividing means.
 12. The arrangement as defined inclaim 10, including current transformer means with output connected tosaid control input means of said sampling means, said transformer meansbeing connected in the phase of said source between said source and saidat least one semi-conductor switch.
 13. The arrangement as defined inclaim 12, including diode means connected in parallel with said controlinput means.
 14. The arrangement as defined in claim 10, wherein saidtime delay means includes a first delay element for determining when thesampling by said sampling means begins and a second time delay elementfor determining the length of the time interval over which samplingoccurs.
 15. The arrangemEnt as defined in claim 14, further including athird delay element in said time delay means for varying the instant ofsampling by said sampling means.
 16. The arrangement as defined in claim1, wherein said source of alternating current is a polyphase source withneutral conductor, said load means being a polyphase load with neutralconductor connected to the neutral conductor of said source, saidsemi-conductor switches being operated in cyclical sequencecorresponding to the phases of said source of alternating current. 17.The arrangement as defined in claim 1, wherein each secondary controlstage is directly connected to said first control stage.